Many applications in MRAM are connected in parallel configuration. A single low resistance path results in a higher drain current through the low resistance path. A low resistance path can be created during a thin film process due to surface asperity or contamination. This may not be a desirable outcome for efficient operation of the MRAM device because a shorted cell causes a high surge in the current. This could result in the current exceeding the current source capability. A cross bar connection in parallel may easily be made but is sensitive to such a low resistance path. By removing any such low resistance path at a wafer probe level, assistance is given to reducing and, hopefully, eliminating such risk. When one cell in a row is shorted, the whole row cannot be used.